Date of Award


Document Type

Doctoral Thesis

Degree Name

Doctor of Philosophy


Electronic Engineering

First Advisor

Dr. John Barrett


Methodologies for cross-verified, wide bandwidth (50MHz-20GHz) electrical model extraction for as-manufactured electronic packaging and interconnection are presented. They are presented in the context that packaging and interconnection is now following a rapidly-evolving Moore’s-type Law in terms of new generations of packaging and interconnection materials, technologies and manufacturing processes. Significant frequency content is also increasing while, at the same time, final product cost constraints mean that packages and circuit boards must typically be manufactured using low cost materials and mass-manufacturing processes, often geographically remote, with their inherently higher levels of variability. Wide bandwidth signal integrity analysis cannot be performed during electronic system design without wide bandwidth electrical models for both packages and interconnects. However, existing methodologies for model extraction rely on time consuming individual techniques, laboratory- fabricated test samples, highly mathematical modelling approaches and specialised measurement equipment, they also offer limited verification of model accuracy and do not have the responsiveness or flexibility required in the face of rapidly evolving technology. The work presented here therefore had the objective of developing cross- verified methodologies for wide bandwidth electrical model extraction that, although based on sound scientific approaches, can be applied by the practicing engineer, using user-friendly modelling tools and standard laboratory measurement equipment, to test samples that can be fabricated using standard manufacturing processes. To achieve this, a detailed review was first completed of existing model extraction methodologies and their disadvantages relative to the demands of evolving packaging and interconnection technologies. By then initially reducing the problem to electrical model extraction for a small number of interconnection structures representative of those typically found in packages and boards, a draft methodology combining two modelling and two measurement techniques was proposed. The appropriateness of the methodology was then verified using test samples representative of modem packaging and interconnection: an ultra-miniature plastic chip-scale package and controlled impedance copper interconnections on very thin flexible polyimide. The methodologies yielded a cross-verified electrical model to 8GHz for the chip-scale package, the first known application of these multiple techniques to a CSP to this bandwidth. They also gave cross-verified whole-interconnect models to 20GHz, including copper and dielectric losses and the effects of moisture absorption, for the polyimide, the first known extraction of such models to this bandwidth for copper-polyimide interconnections.

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